Sorry for all these messages.
Everything seems to be connected to the right places.
I have found another difference though.
The build manual says that L1 the inductor is 150uh, but the schematics show that to be a 150uh, will this make much difference?
Thanks soooo much for your patience with me.
Inductor 100uH versus 150uH - not sure which one is right. If you have the wrong inductor it could affect performance but probably would not keep it from running at all.
I'm not sure about c6 either. Earlier in the thread Ian said he was going to check his working board to see if he used a 360pF or a 680pF but so far he hasn't told us what he found out.
Capacitors in PARALLEL add together, so if you put a 30pF in parallel with your 330pF it would make 360pF. But 330 should be close enough to get it to at least do something.
You could try reading voltages on the MC34063's pins - it might tell us something useful or it might not. Here are the readings I'd expect (based on a real quick look & think).
Negative meter probe goes on any ground test point and stays there.
Pins 1, 6, 7, 8 all approx +5V
Pin 4 zero volts
Pin 5 somewhere between +0.5V and +2.5V
Pins 2 and 3 really need to be looked at with a scope, but I'm thinking if you stick your meter on them you should see jittery readings substantially greater than 0V. Pin 2 is actually putting out a rectangular waveform that swings from 0V to +5V at 100-ish KHz and is pulse width modulated. Pin 3 is kind of a modified sawtooth.
Look into it later when the dust is clearing off the crater.
Hi to all,
just out of curiosity I've taken a look into the Schematics of the HV converter Ian published in
There are some things I don't understand:
First of all, what shall the 220uF at the Ipk pin achieve? The effect is that the peak current limit is now dynamic and a mixture of the voltage drop caused by the current through R1 and the current through the ESR of the 220uF capacitor. And what's missing in the schematics is a bypass capacitor for Vin.
The driving stage for the IRF640 is the second thing - the 2N3906 is working in common collector configuration, so without a negative helper voltage for the pull down resistor it cannot pull down the gate of the IRF 640 to 0V.
As far as i've read through the data sheet the MC34063 has a minimum on time defined by the size of the timing capacitor. I've not yet gone through the formulas given in the data sheet as it makes no sense without knowing the exact parts used (actual capacitance, the operation and the saturation currents of the inductor).
What would also be interesting (but not too easy to measure) would be if there is any ringing on the gate of the IRF640 that could lead to unwanted effects. You can't seriously measure this with a standard probe because you catch more noise and interference through the loop you build up with the ground cable of the probe.
I was approaching this with the thought: "Ian has one of these boards that works, Jonathan has the same board and it doesn't work, what could be wrong with Jonathan's assembly or parts?". I hadn't questioned the design too much since Ian told us he has one working. I agree with the points you have made but I think they would cause performance problems, not cause the circuit to refuse to run at all.
Having said that... I have seen this same circuit, including the strangely placed electrolytic cap and the PNP "gate discharge" circuit, several other places online. I have not, however, seen this in any official data sheet or app note. Now that I look at this a little closer, I think the capacitor connection to pin 7 (Ipk sense) must be an error. I didn't notice it until you pointed it out - my eyes were seeing what they expected to see, not what is actually there. It makes no sense to me to have it connected like that and I think it should be connected to pin 6 Vin instead, my thinking being that it could serve as a local reservoir of sorts (?)
As for the PNP gate discharge, I'm not sure I understand what's going on there. My impression is that when the transistor's base is pulled to ground by the 1K resistor, it would conduct until the mosfet's gate is pulled down to ~0.7 volts, at which point it would turn off. It wouldn't take Vgs all the way to 0 but it would seem to take it below the mosfet's threshold voltage. I'm not sure why the diode and transistor are even necessary, except that one online source I looked at claims it makes the mosfet turn off significantly faster than a resistor alone (cooler running?). I'd like to hear what you think about this so maybe I can learn something!
I believe that this capacitor is simply connected wrong. The threeneurons PSU also doesn's have any bulk and/or bypass capacitors on Vin. As mentioned, the peak current through the inductor is determined by the voltage drop over Vin and Ipk. With (in the threeneurons schemantics) C1 mounted at Vin this would simply be (R1|R2)*I_L1. With 300mV Ipk voltage drop this would roughly be 1.2A. But with the wrongly connected capacitor C1 will additionally deliver current, the voltage drop compared to Vin then depends on the discharging of C1 and its ESR. And the ESR highly depends on the capacitor chosen and can be anywhere between 20mOhm (Polymer type) to several hundred mOhm (higher ESR electrolyte types). So the result is highly dynamic and no longer clearly predictable.
With a correctly connected capacitor Ian's circuit would have been set to roughly 135mA peak current on the Vin side which could closely sufficient for a clock with four small Nixie tubes (At 12V Vin: Iout_max = 135mA*12V/170V*x < 10mA with x somewhat smaller than 1 due to losses).
BTW, I found a
article for another boost circuit which uses the same driver stage as Ian's and the threeneurons circuitry where the bulk capacitor is placed correctly.
P. S. As often I believe someone first introduced this error (perhaps in the threeneurons article, perhaps somewhere else) and then it was simply copied and copied again without questioning the schematics or checking the values.
P. P. S. Another thing to point out: The IRF640 has the typical V_GS of +/-20V. The MC34036 will drive the gate nearly up to Vin. The HV converter circuitry doesn't protect the gate in any way. I haven't seen the whole schematics of the clock, but Ty, I remember that you received them. Is the input voltage limited in any way e. g. by a TVS diode?